We are Hiring for Multiple Sponsored Projects!

Interested Graduate and Undergraduate Students Please Reach out to akhilesh.jaiswal@wisc.edu

Today’s Silicon hardware computing systems are based on decades old doctrine of ‘One Device (MOSFET), One Circuit (synchronous Boolean Logic) and One Architecture (von-Neumann Architecture). The Laboratory for Computing with Unconventional Technologies (COMPUTE Lab) aims to modernize the hardware computing stack by leveraging – (i) state-of-the-art advances in new chip integration technology like 3D and 2.5D integration, (ii) existing CMOS and emerging device technologies, (iii) design strategies spanning digital and analog circuits for targeted end applications that include Intelligence at Extreme-Edge, Hardware for AI, Neuromorphic Computing, Processing-in-Pixel, Processing-in-Memory, Optical Computing, Extreme-scale computing, etc.

Our research approach is highly cross-disciplinary and include close collaborations with neuroscientists, semiconductor manufacturing experts, statisticians, roboticist, algorithm and application designers and is advised by leading experts in industry, DoD labs and startups. The lab has special focus on application-driven hardware solutions with emphasis on manufacturing feasibility in semiconductor foundries.

Research Highlights

  • 2018: One of the initial (perhaps the first) proposal to enable multi-bit in-memory convolution operation in SRAM cells.
  • 2022: First work to show complex ML tasks with applications to self-driving cars can be mapped inside camera pixels using massively parallel analog computing.
  • 2023: First work to propose a scheme for enabling processing-in-pixel for neuromorphic image sensors.
  • 2023: First proposal to leverage 3D integration technology for creating second-generation of retina-inspired camera mimicking full retinal computations from photorecpetors to Retinal Ganglion Cells (the output of retina).
  • 2021-23: First proposal for creation of electro-optic SRAM using existing silicon photonics components from standard semiconductor foundries.

Sponsors and Acknowledgements